1. Field of the Invention
The present invention relates to a conductive film structure and a fabrication method thereof, and in particular relates to a conductive film structure suitable for fabricating a probe card.
2. Description of the Related Art
Probe cards are used to perform electrical testing of integrated circuits (ICs) on a wafer before they are cut and packaged. Thus, allowing for determination of faulty ICs before further processing. With the development of nanoelectronic technologies, line widths of ICs have been shrunk to nano scale and the spacing between pads have also shrunk. Thus, probe cards with small probe pin pitches are required to accommodate the ICs with decreased spacing between pads.
According to the International Technology Roadmap for Semiconductor (ITRS), the smallest line width of an IC is currently 68 nanometers and the spacing between pads for testing is 30 μm. The ITRS expects the line width of an IC to further shrink to 36 nanometers and the spacing between pads for testing to be further shrink to 20 μm. However, currently, a serious technical bottleneck has been reached, for conventional probe cards to perform electrical testing of ICs on a wafer with pad spacing smaller than 30 μm.
Conventional probe cards which are commercially available comprise a cantilever type probe card, such as an epoxy ring probe card, a vertical type probe card, such as a Cobra probe card, and advanced MEMS probe cards commonly used for DRAMs.
Although the probe pin pitches of the cantilever type probe card may be as small as 40 μm, the cantilever type probe card is only suitable for testing pads disposed around a periphery of a wafer to be tested. Pads inside of the wafer can not be tested and the number of the probe pins is also limited. As for the vertical type probe cards, such as U.S. Pat. No. 4,027,935 titled “Contact for an electrical contactor assembly”, although the pads inside of the wafer can be tested and the number of probe pins is relatively less limited, there is a technical bottleneck for the probe pin pitches to be smaller than 100 μm. In addition, the vertical type probe card is only suitable for testing of flip chip packaged ICs.
Additionally, both the cantilever type and vertical type probe cards must be manually installed in a printed circuit board. As such, the manufacturing cost depends highly on the amount of probe pins. As requirement for probe pins increase, so does the manufacturing cost.
As for MEMS probe cards commonly used for DRAMs, such as U.S. Pat. No. 5,476,211 titled “Method of manufacturing electrical contacts, using a sacrificial member” or U.S. Pat. No. 6,268,015 titled “Method of making and using lithographic contact springs”, the manufacturing process is very complicated. Specifically, fabrication complexity increases for probe pin pitches smaller than 70 μm. In addition, testing pad arrangements are limited. As such, relative costs for MEMS probe cards are high.
In summary, conventional probe cards are all limited to “one probe corresponding to one pad” type. When disposition of testing pads are adjusted, probe pins need to be re-fabricated. Further, the fabrication of probe cards is hindered by the process limitations of micron probe pins. Probe pin manufacturing costs using conventional fabrication methods, such as molding, drawing, or rolling, are not feasible. In addition, the configuration and size of probe pins are limited by many factors. Although a photolithography/etching method, such as Taiwan Patent Application No. 90107441 and 93107026, may be used to fabricate probe pins, they still use the “one probe corresponding to one pad” type. Therefore, probe cards, with small probe pin pitches to accommodate ICs with decreased spacing between pads and fabricated with relatively lower costs is desired to accommodate testing requirements of nanoelectronic devices.
Thus, in lieu of the above, the inventor of the present application has disclosed a novel conductive film structure, manufacturing method thereof, and a probe card having the conductive film structure. U.S. patent application Ser. No. 12/032,169 is incorporated by references herein. For this method, a single-layered conductive film is first formed overlying a substrate. The single-layered conductive film comprises an insulating film and micro-wires formed therein. Then, the single-layered conductive film is removed from the substrate and stacked with other single-layered conductive films formed and removed by the same method to form a conductive film structure. The micro-wires in the conductive film structure can be used as the probe pins in probe cards. By using a photolithography and etching process, diameters and pitches of probe pins can be easily controlled, overcoming conventional probe pin fabricating difficulties, such as limiting to low pin counts, having to manually process each pin, arrangement limitation of pins, and further shrinking pin diameters. Additionally, because the conductive film type probe card provided by the inventor is not a “one probe corresponding to one pad” type probe card, it overcomes the technical bottleneck of probe pin pitches and probe pin counts for conventional probe cards and has greater application potential. However, the method mention above requires repeatedly forming and removing a plurality of single-layered conductive films. Additionally, the single-layered conductive films need to be individually adhered one by one, thus, taking up time and effort.
Thus, in order to reduce process work time and effort of the conductive film type probe card, the embodiments of the present invention provide a simple method for fabricating the conductive film structure, a conductive film structure, and a conductive film type probe device for ICs (probe cards) having the conductive film structure. The probe cards of embodiments of the invention are suitable for testing wafers with any kind of pad arrangements to accommodate ICs with decreased spacing between pads.